On Fri, 29 Oct 2021 19:18:13 +0100, Oliver Upton <oupton@xxxxxxxxxx> wrote: > > Hey Marc, > > On Fri, Oct 29, 2021 at 4:31 AM Marc Zyngier <maz@xxxxxxxxxx> wrote: > > > > On Fri, 29 Oct 2021 01:32:02 +0100, > > Oliver Upton <oupton@xxxxxxxxxx> wrote: > [...] > > > case SYS_ID_AA64DFR0_EL1: > > > - /* Limit debug to ARMv8.0 */ > > > + /* Limit debug to ARMv8.2 */ > > > val &= ~ARM64_FEATURE_MASK(ID_AA64DFR0_DEBUGVER); > > > - val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64DFR0_DEBUGVER), 6); > > > + val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64DFR0_DEBUGVER), 8); > > > + > > > + /* Hide DoubleLock from guests */ > > > + val &= ~ARM64_FEATURE_MASK(ID_AA64DFR0_DOUBLELOCK); > > > + val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64DFR0_DOUBLELOCK), 0CF); > > > + > > > > One issue with that is that this will break migration from an older > > kernel (DFR0 will be different between source and destination). > > > > You'll need a set_user handler and deal with it in a similar way to > > CSV2/CSV3. > > Yeah, definitely so. In that case, unless we're strongly motivated to > expose these changes soon, I'll just punt the ID register changes > until Reiji's series [1] lands, as anything I add for a writable DFR0 > will invariably be scrapped in favor of his work. Yeah, I think that's a sensible thing to do. I need to find the bandwidth to look into these patches... > I'll post v2 of this series folding in your feedback (thx for quick > review, btw), less this patch. Thanks, M. -- Without deviation from the norm, progress is not possible.
