On Mon, Aug 2, 2021 at 6:25 AM Xiaoyao Li <xiaoyao.li@xxxxxxxxx> wrote: > > No. bit 63 is not for readonly fields, but for non_arch fields. > > Please see 18.7.1 General definition Thank you so much! make sense. > > Is this information correct and is this included in the spec? I tried > > to find it but somehow I do not see it clearly defined. > > > >> +#define TDX1_NR_TDCX_PAGES 4 > >> +#define TDX1_NR_TDVPX_PAGES 5 > >> + > >> +#define TDX1_MAX_NR_CPUID_CONFIGS 6 > > Why is this just 6? I am looking at the CPUID table in the spec and > > there are already more than 6 CPUID leaves there. > > This is the number of CPUID config reported by TDH.SYS.INFO. Current KVM > only reports 6 leaves. I, personally, still think that it should be enumerated, rather than hardcoded. It is not clear to me why it is 6 and nothing in the spec says it will not change. > >> +#define TDX1_MAX_NR_CMRS 32 > >> +#define TDX1_MAX_NR_TDMRS 64 > >> +#define TDX1_MAX_NR_RSVD_AREAS 16 > >> +#define TDX1_PAMT_ENTRY_SIZE 16 > >> +#define TDX1_EXTENDMR_CHUNKSIZE 256 > > > > I believe all of the defined variables above need to be enumerated > > with TDH.SYS.INFO. > > No. Only TDX1_MAX_NR_TDMRS, TDX1_MAX_NR_RSVD_AREAS and > TDX1_PAMT_ENTRY_SIZE can be enumerated from TDH.SYS.INFO. > > - TDX1_MAX_NR_CMRS is described in 18.6.3 CMR_INFO, which tells > > TDH.SYS.INFO leaf function returns a MAX_CMRS(32) entry array > of CMR_INFO entries. > > - TDX1_EXTENDMR_CHUNKSIZE is describe in 20.2.23 TDH.MR.EXTEND Thanks for the pointers for MAX_CMRS and TDX1_EXTENDMR_CHUNKSIZE. Will the rest of it be enumerated or hardcoded? > >> +#define TDX_TDMR_ADDR_ALIGNMENT 512 > > Is TDX_TDMR_ADDR_ALIGNMENT used anywhere or is it just for completeness? > > It's the leftover during rebase. We will clean it up. Thanks! > SEAMCALL TDH.SYS.INFO requires each cmr info in CMR_INFO_ARRAY to be > 512B aligned Make sense, Thanks for the explanation.
