On 10/07/20 20:33, Nadav Amit wrote:
> DR4/DR5 can only be written when CR4.DE is clear, and otherwise trigger
> a #GP exception. The BIOS might not clear CR4.DE so update the tests not
> to make this assumption.
>
> Signed-off-by: Nadav Amit <namit@xxxxxxxxxx>
> ---
> x86/svm_tests.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/x86/svm_tests.c b/x86/svm_tests.c
> index d4d130f..9adee23 100644
> --- a/x86/svm_tests.c
> +++ b/x86/svm_tests.c
> @@ -171,6 +171,7 @@ static void prepare_dr_intercept(struct svm_test *test)
> default_prepare(test);
> vmcb->control.intercept_dr_read = 0xff;
> vmcb->control.intercept_dr_write = 0xff;
> + vmcb->save.cr4 &= ~X86_CR4_DE;
> }
>
> static void test_dr_intercept(struct svm_test *test)
>
I think we should just start with a clean slate and clear CR4 in cstart*.S:
------------ 8< ------------
>From d86ef5851964521c4558e73e43187912718e6746 Mon Sep 17 00:00:00 2001
From: Paolo Bonzini <pbonzini@xxxxxxxxxx>
Date: Fri, 10 Jul 2020 16:44:18 -0400
Subject: [PATCH kvm-unit-tests] cstart: do not assume CR4 starts as zero
The BIOS might leave some bits set in CR4; for example, CR4.DE=1 would
cause the SVM test for the DR intercept to fail, because DR4/DR5
can only be written when CR4.DE is clear, and otherwise trigger
a #GP exception.
Reported-by: Nadav Amit <namit@xxxxxxxxxx>
Signed-off-by: Paolo Bonzini <pbonzini@xxxxxxxxxx>
diff --git a/x86/cstart.S b/x86/cstart.S
index 409cb00..e63e4e2 100644
--- a/x86/cstart.S
+++ b/x86/cstart.S
@@ -125,8 +125,7 @@ start:
jmpl $8, $start32
prepare_32:
- mov %cr4, %eax
- bts $4, %eax // pse
+ mov %(1 << 4), %eax // pse
mov %eax, %cr4
mov $pt, %eax
diff --git a/x86/cstart64.S b/x86/cstart64.S
index fabcdbf..3ae98d3 100644
--- a/x86/cstart64.S
+++ b/x86/cstart64.S
@@ -176,8 +176,7 @@ prepare_64:
setup_segments
enter_long_mode:
- mov %cr4, %eax
- bts $5, %eax // pae
+ mov $(1 << 5), %eax // pae
mov %eax, %cr4
mov pt_root, %eax
WDYT?
Paolo
