On 30/06/20 11:45, Nadav Amit wrote:
> According to AMD manual bit 8 in PDPE is not reserved, but bit 7.
Indeed. Maybe it was a problem in the previous versions because I
remember adding this check explicitly. I've sent a patch.
Paolo
> Signed-off-by: Nadav Amit <namit@xxxxxxxxxx>
> ---
> x86/svm_tests.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/x86/svm_tests.c b/x86/svm_tests.c
> index 92cefaf..323031f 100644
> --- a/x86/svm_tests.c
> +++ b/x86/svm_tests.c
> @@ -825,13 +825,13 @@ static void npt_rsvd_pfwalk_prepare(struct svm_test *test)
> vmcb_ident(vmcb);
>
> pdpe = npt_get_pdpe();
> - pdpe[0] |= (1ULL << 8);
> + pdpe[0] |= (1ULL << 7);
> }
>
> static bool npt_rsvd_pfwalk_check(struct svm_test *test)
> {
> u64 *pdpe = npt_get_pdpe();
> - pdpe[0] &= ~(1ULL << 8);
> + pdpe[0] &= ~(1ULL << 7);
>
> return (vmcb->control.exit_code == SVM_EXIT_NPF)
> && (vmcb->control.exit_info_1 == 0x20000000eULL);
>
