On Thu, Apr 23, 2020 at 09:27:49AM -0700, Sean Christopherson wrote:
> On Thu, Mar 26, 2020 at 04:18:39PM +0800, Yang Weijiang wrote:
> > @@ -3033,6 +3033,13 @@ void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
> > vmcs_writel(GUEST_CR3, guest_cr3);
> > }
> >
> > +static bool is_cet_mode_allowed(struct kvm_vcpu *vcpu, u32 mode_mask)
>
> CET itself isn't a mode. And since this ends up being an inner helper for
> is_cet_supported(), I think __is_cet_supported() would be the way to go.
>
> Even @mode_mask is a bit confusing without the context of it being kernel
> vs. user. The callers are very readable, e.g. I'd much prefer passing the
> mask as opposed to doing 'bool kernel'. Maybe s/mode_mask/cet_mask? That
> doesn't exactly make things super clear, but at least the reader knows the
> mask is for CET features.
Make sense, will change it.
>
> > +{
> > + return ((supported_xss & mode_mask) &&
> > + (guest_cpuid_has(vcpu, X86_FEATURE_SHSTK) ||
> > + guest_cpuid_has(vcpu, X86_FEATURE_IBT)));
> > +}
> > +
> > int vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
> > {
> > struct vcpu_vmx *vmx = to_vmx(vcpu);
> > @@ -7064,6 +7071,35 @@ static void update_intel_pt_cfg(struct kvm_vcpu *vcpu)
> > vmx->pt_desc.ctl_bitmask &= ~(0xfULL << (32 + i * 4));
> > }
> >
> > +static void vmx_update_intercept_for_cet_msr(struct kvm_vcpu *vcpu)
> > +{
> > + struct vcpu_vmx *vmx = to_vmx(vcpu);
> > + unsigned long *msr_bitmap = vmx->vmcs01.msr_bitmap;
> > + bool flag;
>
> Maybe s/flag/incpt or something to make it more obvious that the bool is
> true if we want to intercept? vmx_set_intercept_for_msr()s's @value isn't
> any better :-/.
I prefer using incpt now ;-)
> > +
> > + flag = !is_cet_mode_allowed(vcpu, XFEATURE_MASK_CET_USER);
> > + /*
> > + * U_CET is required for USER CET, and U_CET, PL3_SPP are bound as
> > + * one component and controlled by IA32_XSS[bit 11].
> > + */
> > + vmx_set_intercept_for_msr(msr_bitmap, MSR_IA32_U_CET, MSR_TYPE_RW, flag);
> > + vmx_set_intercept_for_msr(msr_bitmap, MSR_IA32_PL3_SSP, MSR_TYPE_RW, flag);
> > +
> > + flag = !is_cet_mode_allowed(vcpu, XFEATURE_MASK_CET_KERNEL);
> > + /*
> > + * S_CET is required for KERNEL CET, and PL0_SSP ... PL2_SSP are
> > + * bound as one component and controlled by IA32_XSS[bit 12].
> > + */
> > + vmx_set_intercept_for_msr(msr_bitmap, MSR_IA32_S_CET, MSR_TYPE_RW, flag);
> > + vmx_set_intercept_for_msr(msr_bitmap, MSR_IA32_PL0_SSP, MSR_TYPE_RW, flag);
> > + vmx_set_intercept_for_msr(msr_bitmap, MSR_IA32_PL1_SSP, MSR_TYPE_RW, flag);
> > + vmx_set_intercept_for_msr(msr_bitmap, MSR_IA32_PL2_SSP, MSR_TYPE_RW, flag);
> > +
> > + flag |= !guest_cpuid_has(vcpu, X86_FEATURE_SHSTK);
> > + /* SSP_TAB is only available for KERNEL SHSTK.*/
> > + vmx_set_intercept_for_msr(msr_bitmap, MSR_IA32_INT_SSP_TAB, MSR_TYPE_RW, flag);
> > +}
> > +
> > static void vmx_cpuid_update(struct kvm_vcpu *vcpu)
> > {
> > struct vcpu_vmx *vmx = to_vmx(vcpu);
> > @@ -7102,6 +7138,10 @@ static void vmx_cpuid_update(struct kvm_vcpu *vcpu)
> > vmx_set_guest_msr(vmx, msr, enabled ? 0 : TSX_CTRL_RTM_DISABLE);
> > }
> > }
> > +
> > + if (guest_cpuid_has(vcpu, X86_FEATURE_SHSTK) ||
> > + guest_cpuid_has(vcpu, X86_FEATURE_IBT))
> > + vmx_update_intercept_for_cet_msr(vcpu);
>
> This is wrong, it will miss the case where userspace double configures CPUID
> and goes from CET=1 to CET=0. This should instead be:
>
> if (supported_xss & (XFEATURE_MASK_CET_KERNEL | XFEATURE_MASK_CET_USER))
> vmx_update_intercept_for_cet_msr(vcpu);
>
> > }
Here CET=1/0, did you mean the CET bit in XSS or CR4.CET? If it's the
former, then it's OK for me.
> >
> > static __init void vmx_set_cpu_caps(void)
> > --
> > 2.17.2
> >
