On Wed, Apr 22, 2020 at 1:30 AM Paolo Bonzini <pbonzini@xxxxxxxxxx> wrote: > > On 14/04/20 02:09, Jim Mattson wrote: > > Previously, if the hrtimer for the nested VMX-preemption timer fired > > while L0 was emulating an L2 instruction with RFLAGS.TF set, the > > synthesized single-step trap would be unceremoniously dropped when > > synthesizing the "VMX-preemption timer expired" VM-exit from L2 to L1. > > > > To fix this, don't synthesize a "VMX-preemption timer expired" VM-exit > > from L2 to L1 when there is a pending debug trap, such as a > > single-step trap. > > Do you have a testcase for these bugs? Indeed. They should be just prior to this in your inbox.
