On Sun, Sep 8, 2019 at 9:11 PM Krish Sadhukhan <krish.sadhukhan@xxxxxxxxxx> wrote: > It seems like a good solution. The only problem I see in this is that > using the reserved bits is not guaranteed to work forever as the > hardware vendors can decide to use them anytime. Unlikely, but point taken. > Instead, I was wondering whether we could set bits 31:0 in the first > entry in the VM-entry MSR-load area of vmcs02 to a value of C0000100H. > According to Intel SDM, this will cause VM-entry to fail: > > "The value of bits 31:0 is either C0000100H (the > IA32_FS_BASE MSR) or C0000101 (the IA32_GS_BASE MSR)." > > We can use bits 127:64 of that entry to indicate which MSR entry in the > vmcs12 MSR-load area had an error and then we synthesize an exit > qualification from that information. That seems reasonable to me.
