AMD allows guests to execute XSAVES/XRSTORS if supported by the host.
This is different than Intel as they have an additional control bit that
determines if XSAVES/XRSTORS can be used by the guest. Intel also has
intercept bits that might prevent the guest from intercepting the
instruction as well. AMD has none of that, not even an Intercept
mechanism. AMD simply allows XSAVES/XRSTORS to be executed by the guest
if also supported by the host.
Signed-off-by: Aaron Lewis <aaronlewis@xxxxxxxxxx>
---
arch/x86/kvm/svm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 1f220a85514f..b681a89f4f7e 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -5985,7 +5985,7 @@ static bool svm_mpx_supported(void)
static bool svm_xsaves_supported(void)
{
- return false;
+ return boot_cpu_has(X86_FEATURE_XSAVES);
}
static bool svm_umip_emulated(void)
--
2.23.0.187.g17f5b7556c-goog
