On 18/05/19 17:48, Nadav Amit wrote:
> After the APIC is reset, some of its registers might be reset. As the
> SDM says: "When IA32_APIC_BASE[11] is set to 0, prior initialization to
> the APIC may be lost and the APIC may return to the state described in
> Section 10.4.7.1". The SDM also says that after APIC reset "the
> spurious-interrupt vector register is initialized to 000000FFH". This
> means that after the APIC is reset it needs to be software-enabled
> through the SPIV.
>
> This is done one occasion, but there are other occasions that do not
> software-enable the APIC after reset (e.g., __test_apic_id() and main()
> in vmx.c). Reenable software-enable APIC in these cases.
>
> Cc: Sean Christopherson <sean.j.christopherson@xxxxxxxxx>
> Reviewed-by: Krish Sadhukhan <krish.sadhukhan@xxxxxxxxxx>
> Signed-off-by: Nadav Amit <nadav.amit@xxxxxxxxx>
>
> ---
>
> v1->v2: Change 0xf0 to APIC_SPIV in one occasion [Krish]
> ---
> lib/x86/apic.c | 3 ++-
> x86/apic.c | 1 -
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/lib/x86/apic.c b/lib/x86/apic.c
> index 2aeffbd..d4528bd 100644
> --- a/lib/x86/apic.c
> +++ b/lib/x86/apic.c
> @@ -161,6 +161,7 @@ void reset_apic(void)
> {
> disable_apic();
> wrmsr(MSR_IA32_APICBASE, rdmsr(MSR_IA32_APICBASE) | APIC_EN);
> + apic_write(APIC_SPIV, 0x1ff);
> }
>
> u32 ioapic_read_reg(unsigned reg)
> @@ -219,7 +220,7 @@ void set_irq_line(unsigned line, int val)
> void enable_apic(void)
> {
> printf("enabling apic\n");
> - xapic_write(0xf0, 0x1ff); /* spurious vector register */
> + xapic_write(APIC_SPIV, 0x1ff);
> }
>
> void mask_pic_interrupts(void)
> diff --git a/x86/apic.c b/x86/apic.c
> index 3eff588..7ef4a27 100644
> --- a/x86/apic.c
> +++ b/x86/apic.c
> @@ -148,7 +148,6 @@ static void test_apic_disable(void)
> verify_disabled_apic_mmio();
>
> reset_apic();
> - apic_write(APIC_SPIV, 0x1ff);
> report("Local apic enabled in xAPIC mode",
> (rdmsr(MSR_IA32_APICBASE) & (APIC_EN | APIC_EXTD)) == APIC_EN);
> report("CPUID.1H:EDX.APIC[bit 9] is set", cpuid(1).d & (1 << 9));
>
Queued, thanks.
Paolo
