On 07/18/2018 04:25 AM, Paolo Bonzini wrote: > On 27/06/2018 23:59, Junaid Shahid wrote: >> + >> + /* >> + * We can only get a non-canonical address here if called through >> + * kvm_mmu_invlpg(). So it is ok to ignore it because an INVLPG on a >> + * non-canonical address is a NOP according to the Intel SDM. >> + */ >> + if (is_noncanonical_address(addr, vcpu)) >> + return; >> + > > I moved this check to kvm_mmu_invlpg instead. > I had actually put the check here because the behavior of ignoring non-canonical address INVLPGs appears to be specific to Intel. AMD's programmer's manual doesn't say anything about this case one way or the other. But a quick experiment revealed that AMD CPUs do not ignore non-canonical address INVLPGs, but rather just invalidate based on the lower 48-bits. Of course, that doesn't necessarily mean that it is the architectural behavior for AMD vs. just an implementation detail (since invalidating more than the requirement is always allowed). Can we assume that the behavior specified in the Intel SDM for INVLPG is the architectural behavior for AMD as well? Thanks, Junaid
