> -----Original Message----- > From: Eduardo Habkost [mailto:ehabkost@xxxxxxxxxx] > Sent: Wednesday, June 6, 2018 4:26 PM > To: Moger, Babu <Babu.Moger@xxxxxxx> > Cc: mst@xxxxxxxxxx; marcel.apfelbaum@xxxxxxxxx; pbonzini@xxxxxxxxxx; > rth@xxxxxxxxxxx; mtosatti@xxxxxxxxxx; qemu-devel@xxxxxxxxxx; > kvm@xxxxxxxxxxxxxxx; kash@xxxxxxxxxxxxxx; geoff@xxxxxxxxxxxxxxx > Subject: Re: [PATCH v12 1/4] i386: Add support for CPUID_8000_001E for > AMD > > On Wed, Jun 06, 2018 at 10:36:43AM -0400, Babu Moger wrote: > [...] > > + /* > > + * CPUID_Fn8000001E_EBX > > + * 31:16 Reserved > > + * 15:8 Threads per core (The number of threads per core is > > + * Threads per core + 1) > > + * 7:0 Core id (see bit decoding below) > > + * SMT: > > + * 4:3 node id > > + * 2 Core complex id > > + * 1:0 Core id > > + * Non SMT: > > + * 5:4 node id > > + * 3 Core complex id > > + * 1:0 Core id > > + */ > > Where are those bit offsets documented? AMD Family 17h PPR just > says "7:0 Core ID". Yes. That is right. AMD Family 17h PPR does not list all the details for core_id. We are working with our document writer's to make those details public. Thanks for pointing that out. > > -- > Eduardo
