----- junaids@xxxxxxxxxx wrote:
> On 05/13/2018 05:00 PM, Liran Alon wrote:
> >> +static void vmx_flush_tlb_gva(struct kvm_vcpu *vcpu, gva_t addr)
> >> +{
> >> + int vpid = to_vmx(vcpu)->vpid;
> >> +
> >> + if (!vpid_sync_vcpu_addr(vpid, addr))
> >> + vpid_sync_context(vpid);
> >> +}
> >
> > If VPID is not supported or module parameter enable_vpid=0, then
> vmx_flush_tlb_gva() will do nothing.
> > I think that if !enable_vpid you should invlpg addr.
> >
>
> If VPIDs are not in use, then the VM-entry/exit is in any case going
> to flush the TLB. So doing nothing
> here is alright.
>
It seems that you are right.
By Intel SDM 28.3.3.1 Operations that Invalidate Cached Mappings:
"If the “enable VPID” VM-execution control is 0, VM entries and VM exits invalidate linear mappings and
combined mappings associated with VPID 0000H (for all PCIDs). Combined mappings for VPID 0000H are
invalidated for all EP4TAs."
I would just add a comment on this in vmx_flush_tlb_gva().
Thanks for clarifying this for me. :)
> Thanks,
> Junaid
