On Thu, Apr 26, 2018 at 11:26:47AM -0500, Babu Moger wrote: > Populate threads/core_id/apic_ids/socket_id when CPUID_EXT3_TOPOEXT > feature is supported. This is required to support hyperthreading feature > on AMD CPUs. This is supported via CPUID_8000_001E extended functions. > > Signed-off-by: Babu Moger <babu.moger@xxxxxxx> > Tested-by: Geoffrey McRae <geoff@xxxxxxxxxxxxxxx> > --- > target/i386/cpu.c | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c > index 1024b09..1b15023 100644 > --- a/target/i386/cpu.c > +++ b/target/i386/cpu.c > @@ -315,6 +315,12 @@ static uint32_t encode_cache_cpuid80000005(CPUCacheInfo *cache) > (((CORES_IN_CMPLX - 1) * 2) + 1) : \ > (CORES_IN_CMPLX - 1)) > > +/* Definitions used on CPUID Leaf 0x8000001E */ > +#define EXTENDED_APIC_ID(threads, socket_id, core_id, thread_id) \ > + ((threads) ? \ > + ((socket_id << 6) | (core_id << 1) | thread_id) : \ > + ((socket_id << 6) | core_id)) I suggest moving this to i386/topology.h. > + > /* > * Encode cache info for CPUID[0x80000006].ECX and CPUID[0x80000006].EDX > * @l3 can be NULL. > @@ -4105,6 +4111,14 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, > break; > } > break; > + case 0x8000001E: > + assert(cpu->core_id <= 255); Where's the code that ensures this assert() line can't be triggered by any command-line configuration? > + *eax = EXTENDED_APIC_ID((cs->nr_threads - 1), > + cpu->socket_id, cpu->core_id, cpu->thread_id); > + *ebx = (cs->nr_threads - 1) << 8 | cpu->core_id; > + *ecx = cpu->socket_id; > + *edx = 0; > + break; > case 0xC0000000: > *eax = env->cpuid_xlevel2; > *ebx = 0; > -- > 2.7.4 > > -- Eduardo
