On 31/01/2018 16:59, David Woodhouse wrote: > > > On Wed, 2018-01-31 at 13:53 -0800, Jim Mattson wrote: >> On Wed, Jan 31, 2018 at 1:42 PM, Paolo Bonzini <pbonzini@xxxxxxxxxx> wrote: >> >>> Can we just say it sucks to be L2 too? :) Because in the end as long as >>> no one ever writes to spec_ctrl, everybody is happy. >> >> Unfortunately, quite a few OS vendors shipped IBRS-based mitigations >> earlier this month. (Has Redhat stopped writing to IA32_SPEC_CTRL yet? >> :-) >> >> And in the long run, everyone is going to set IA32_SPEC_CTRL.IBRS=1 on >> CPUs with IA32_ARCH_CAPABILITIES.IBRS_ALL. > > > I'm actually working on IBRS_ALL at the moment. > > I was tempted to *not* let the guests turn it off. Expose SPEC_CTRL but > just make it a no-op. That would be very slow. > Or if that really doesn't fly, perhaps with IBRS_ALL we should invert > the logic. Set IBRS to 1 on vCPU reset, and only if it's set to *zero* > do we pass through the MSR and set the save_spec_ctrl_on_exit flag. ... but something like that would be a good idea. Even if IBRS to 0 on vCPU reset, only pass it through once it's set to zero. The first IBRS=1 write would not enable pass through, and would not set the save_spec_ctrl_on_exit flag. In fact it need not even be conditional on IBRS_ALL. Paolo > But let's get the code for *current* hardware done first... >
