Re: [PATCH kvm-unit-tests] add vmexit tests for IBRS and IBPB

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----- pbonzini@xxxxxxxxxx wrote:

> On 09/01/2018 16:08, Liran Alon wrote:
> > 
> > ----- pbonzini@xxxxxxxxxx wrote:
> > 
> >> Results on Haswell:
> >>
> >>    wr_ibrs_msr 506     (actually ~250, because the test writes
> twice)
> >>    wr_ibpb_msr 4212
> >>
> >> Yuck.
> >>
> >> Signed-off-by: Paolo Bonzini <pbonzini@xxxxxxxxxx>
> >> ---
> >>  lib/x86/msr.h |  3 +++
> >>  x86/vmexit.c  | 23 +++++++++++++++++++++++
> >>  2 files changed, 26 insertions(+)
> >>
> >> diff --git a/lib/x86/msr.h b/lib/x86/msr.h
> >> index 2c0598c..3eff710 100644
> >> --- a/lib/x86/msr.h
> >> +++ b/lib/x86/msr.h
> >> @@ -32,6 +32,9 @@
> >>  #define EFER_FFXSR		(1<<_EFER_FFXSR)
> >>  
> >>  /* Intel MSRs. Some also available on other CPUs */
> >> +#define MSR_IA32_SPEC_CTRL              0x00000048
> >> +#define MSR_IA32_PRED_CMD               0x00000049
> >> +
> >>  #define MSR_IA32_PERFCTR0		0x000000c1
> >>  #define MSR_IA32_PERFCTR1		0x000000c2
> >>  #define MSR_FSB_FREQ			0x000000cd
> >> diff --git a/x86/vmexit.c b/x86/vmexit.c
> >> index 65111ae..a04e971 100644
> >> --- a/x86/vmexit.c
> >> +++ b/x86/vmexit.c
> >> @@ -413,6 +413,27 @@ static void tscdeadline(void)
> >>  	while (x == 0) barrier();
> >>  }
> >>  
> >> +static int has_spec_ctrl(void)
> >> +{
> >> +    return !!(cpuid_indexed(7,0).d & (1 << 26));
> >> +}
> >> +
> >> +static void wr_ibrs_msr(void)
> >> +{
> >> +	wrmsr(MSR_IA32_SPEC_CTRL, 1);
> >> +	wrmsr(MSR_IA32_SPEC_CTRL, 0);
> >> +}
> >> +
> >> +static int has_ibpb(void)
> >> +{
> >> +    return has_spec_ctrl() || !!(cpuid(0x80000008).b & (1 <<
> 12));
> > 
> > Why are you doing here "has_spec_ctrl() ||" and not just checking
> "cpuid(0x80000008).b & (1 << 12)"?
> 
> Because Intel's recent microcode updates do not expose
> CPUID[EAX=0x80000008].EBX[12], but they do add PRED_CMD MSR.
> 
> Paolo

OK that's weird... :)
So doesn't it make sense to also have same logic in cpu_has_ibpb_support() in KVM?

Also, I would add an appropriate comment above those lines as this is not trivial.

-Liran

> 
> > 
> > -Liran
> > 
> >> +}
> >> +
> >> +static void wr_ibpb_msr(void)
> >> +{
> >> +	wrmsr(MSR_IA32_PRED_CMD, 1);
> >> +}
> >> +
> >>  static struct test tests[] = {
> >>  	{ cpuid_test, "cpuid", .parallel = 1,  },
> >>  	{ vmcall, "vmcall", .parallel = 1, },
> >> @@ -440,6 +461,8 @@ static struct test tests[] = {
> >>  	{ ipi, "ipi", is_smp, .parallel = 0, },
> >>  	{ ipi_halt, "ipi_halt", is_smp, .parallel = 0, },
> >>  	{ ple_round_robin, "ple_round_robin", .parallel = 1 },
> >> +	{ wr_ibrs_msr, "wr_ibrs_msr", has_spec_ctrl, .parallel = 1 },
> >> +	{ wr_ibpb_msr, "wr_ibpb_msr", has_ibpb, .parallel = 1 },
> >>  	{ wr_tsc_adjust_msr, "wr_tsc_adjust_msr", .parallel = 1 },
> >>  	{ rd_tsc_adjust_msr, "rd_tsc_adjust_msr", .parallel = 1 },
> >>  	{ NULL, "pci-mem", .parallel = 0, .next = pci_mem_next },
> >> -- 
> >> 1.8.3.1




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