Re: [PATCH v3 02/11] KVM: x86: Change __kvm_apic_update_irr() to also return if max IRR updated

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On 2017/12/25 00:12, Liran Alon wrote:
This commit doesn't change semantics.
It is done as a preparation for future commits.

Signed-off-by: Liran Alon <liran.alon@xxxxxxxxxx>
Reviewed-by: Nikita Leshenko <nikita.leshchenko@xxxxxxxxxx>
Reviewed-by: Liam Merwick <liam.merwick@xxxxxxxxxx>
Signed-off-by: Liam Merwick <liam.merwick@xxxxxxxxxx>
---
  arch/x86/kvm/lapic.c | 23 ++++++++++++++++-------
  arch/x86/kvm/lapic.h |  4 ++--
  arch/x86/kvm/vmx.c   |  5 +++--
  3 files changed, 21 insertions(+), 11 deletions(-)

diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 0928608750e3..924ac8ce9d50 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -364,32 +364,41 @@ static u8 count_vectors(void *bitmap)
  	return count;
  }
-int __kvm_apic_update_irr(u32 *pir, void *regs)
+bool __kvm_apic_update_irr(u32 *pir, void *regs, int *max_irr)
  {
  	u32 i, vec;
-	u32 pir_val, irr_val;
-	int max_irr = -1;
+	u32 pir_val, irr_val, prev_irr_val;
+	int max_updated_irr;
+
+	max_updated_irr = -1;
  combine this 2 lines..

+	*max_irr = -1;
for (i = vec = 0; i <= 7; i++, vec += 32) {
  		pir_val = READ_ONCE(pir[i]);
  		irr_val = *((u32 *)(regs + APIC_IRR + i * 0x10));
  		if (pir_val) {
+			prev_irr_val = irr_val;
  			irr_val |= xchg(&pir[i], 0);
  			*((u32 *)(regs + APIC_IRR + i * 0x10)) = irr_val;
+			if (prev_irr_val != irr_val) {
+				max_updated_irr =
+					__fls(irr_val ^ prev_irr_val) + vec;
+			}
  		}
  perhaps, we could use some macros, instead of 7, 32, 0x10 ..

  		if (irr_val)
-			max_irr = __fls(irr_val) + vec;
+			*max_irr = __fls(irr_val) + vec;
  	}
- return max_irr;
+	return ((max_updated_irr != -1) &&
+		(max_updated_irr == *max_irr));
  }
  EXPORT_SYMBOL_GPL(__kvm_apic_update_irr);
-int kvm_apic_update_irr(struct kvm_vcpu *vcpu, u32 *pir)
+bool kvm_apic_update_irr(struct kvm_vcpu *vcpu, u32 *pir, int *max_irr)
  {
  	struct kvm_lapic *apic = vcpu->arch.apic;
- return __kvm_apic_update_irr(pir, apic->regs);
+	return __kvm_apic_update_irr(pir, apic->regs, max_irr);
  }
  EXPORT_SYMBOL_GPL(kvm_apic_update_irr);
diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h
index 4b9935a38347..56c36014f7b7 100644
--- a/arch/x86/kvm/lapic.h
+++ b/arch/x86/kvm/lapic.h
@@ -75,8 +75,8 @@ int kvm_lapic_reg_read(struct kvm_lapic *apic, u32 offset, int len,
  bool kvm_apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
  			   int short_hand, unsigned int dest, int dest_mode);
-int __kvm_apic_update_irr(u32 *pir, void *regs);
-int kvm_apic_update_irr(struct kvm_vcpu *vcpu, u32 *pir);
+bool __kvm_apic_update_irr(u32 *pir, void *regs, int *max_irr);
+bool kvm_apic_update_irr(struct kvm_vcpu *vcpu, u32 *pir, int *max_irr);
  void kvm_apic_update_ppr(struct kvm_vcpu *vcpu);
  int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq,
  		     struct dest_map *dest_map);
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 8eba631c4dbd..325608a1ed65 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -5062,7 +5062,8 @@ static void vmx_complete_nested_posted_interrupt(struct kvm_vcpu *vcpu)
  	max_irr = find_last_bit((unsigned long *)vmx->nested.pi_desc->pir, 256);
  	if (max_irr != 256) {
  		vapic_page = kmap(vmx->nested.virtual_apic_page);
-		__kvm_apic_update_irr(vmx->nested.pi_desc->pir, vapic_page);
+		__kvm_apic_update_irr(vmx->nested.pi_desc->pir,
+			vapic_page, &max_irr);
  		kunmap(vmx->nested.virtual_apic_page);
status = vmcs_read16(GUEST_INTR_STATUS);
@@ -9040,7 +9041,7 @@ static int vmx_sync_pir_to_irr(struct kvm_vcpu *vcpu)
  		 * But on x86 this is just a compiler barrier anyway.
  		 */
  		smp_mb__after_atomic();
-		max_irr = kvm_apic_update_irr(vcpu, vmx->pi_desc.pir);
+		kvm_apic_update_irr(vcpu, vmx->pi_desc.pir, &max_irr);
  	} else {
  		max_irr = kvm_lapic_find_highest_irr(vcpu);
  	}
Reviewed-by: Quan Xu <quan.xu0@xxxxxxxxx>


Quan
Alibaba Cloud



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