Hi, This series aims to fix multiple issues with nested-posted-interrupts. 1st patch is a simple optimization to vcpu_enter_guest() hot-path to not need to check if sync_pir_to_irr != NULL. 2nd & 3rd patches fixes an issue of not re-evaluating what should be done with a new L1 pending interrupt that was discovered by syncing PIR to IRR just before resuming L2 guest. For example, this pending L1 event should in most cases result in exiting from L2 to L1 on external-interrupt. But currently, we will just continue resuming L2 which is wrong. 4rd patch clean-up & fix handling of directly injecting a L1 interrupt to L2 when L1 don't intercept external-interrupts. The current handling of this case doesn't correctly consider the LAPIC TPR and doesn't update it's IRR & ISR after injecting the interrupt to L2. Fix this by using standard interrupt injection code-path in this scenario as-well. 5th-09th patches fix multiple issues in sending & dispatching nested-posted-interrupts. The patch fixes these issues by checking if there is pending nested-posted-interrupts before each vmentry and if yes, use self-IPI to make hardware dispatch them instead of emulating behavior in software. 10th-11th patches fixes bugs of not waking up a halted L2 when L1 sends it a nested posted-interrupt and L1 doesn't intercept HLT. Regards, -Liran Alon
