On 27/12/2017 16:15, Liran Alon wrote: > I think I now follow what you mean regarding cleaning logic around > pi_pending. This is how I understand it: > > 1. "vmx->nested.pi_pending" is a flag used to indicate "L1 has sent a > vmcs12->posted_intr_nv IPI". That's it. > > 2. Currently code is a bit weird in the sense that instead of signal the > pending IPI in virtual LAPIC IRR, we set it in a special variable. > If we would have set it in virtual LAPIC IRR, we could in theory behave > very similar to a standard CPU. At interrupt injection point, we could: > (a) If vCPU is in root-mode: Just inject the pending interrupt normally. > (b) If vCPU is in non-root-mode and posted-interrupts feature is active, > then instead of injecting the pending interrupt, we should simulate > processing of posted-interrupts. > > 3. The processing of the nested posted-interrupts itself can still be > done in self-IPI mechanism. > > 4. Because not doing (2), there is still currently an issue that L1 > doesn't receive a vmcs12->posted_intr_nv interrupt when target vCPU > thread has exited from L2 to L1 and pi_pending=true. > > Do we agree on the above? Or am I still misunderstanding something? Yes, I think we agree. Paolo
