Avi Kivity wrote: > Sheng Yang wrote: >> I think that means the PV interface for lapic. And yes, we can >> support it follow MS's interface, but x2apic still seems another >> story as you noted... I still don't think support x2apic here would >> bring us more benefits. >> > > x2apic has the following benefit: > > - msr exits are faster than mmio (no page table walk, emulation) > - no need to read back ICR to look at the busy bit > - one ICR write instead of two > - potential to support large guests once we add interrupt remapping > - shared code with the Hyper-V paravirt interface > Is there any plan to implement an PV irqchip such as Xenirqchip for KVM?-- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
