On 2017/11/29 8:09, Jan H. Schönherr wrote: > On 11/28/2017 04:37 AM, Longpeng (Mike) wrote: >> >> On 2017/11/25 21:09, Jan H. Schönherr wrote: >> >>> Allow to disable pause loop exit/pause filtering on a per VM basis. >>> >>> If some VMs have dedicated host CPUs, they won't be negatively affected >>> due to needlessly intercepted PAUSE instructions. >>> >> Hi Jan, >> >> Is there any difference between 'disable PLE in vmcs' and 'make ple_gap per >> VM/VCPU and set ple_gap=0 for vcpus which is dedicated' ? > > "Just" disabling PLE in vmcs would still call into some of the PLE window > adjustment paths and potentially do some VMCS writes at times. My patch should > have eliminated these cases as well. > Ah, I see, thanks. :) We used a proprietary test suite to benchmark performance with ple_gap=0 and ple_gap=1 (very little VMexits due to PLE in kvm trace), we found that ple_gap=1 is always better than ple_gap=0, we don't know why, maybe impacts the hardware logical. Do you have any idea about this ? > However, making all the PLE configuration knobs per VM has the difficulty > that you'd need to be able to specify them in some way. That would not only > be a x86 specific interface, but a VMX specific one as well. VMX-PLE and > SVM-PF don't look compatible enough for a shared configuration. > > That's why I only went for the binary on/off interface. > Yes, I think your patch is pretty good. > Regards > Jan > > > > . > -- Regards, Longpeng(Mike)
