On Thu, Nov 23, 2017 at 3:57 PM, Paolo Bonzini <pbonzini@xxxxxxxxxx> wrote: > On 22/11/2017 18:56, Jim Mattson wrote: >> I don't >> believe that L1 has to have lapic_in_kernel() for L0 to use the APICv >> features of the hardware when running L2. > > Without lapic_in_kernel() the guest doesn't have the X2APIC CPUID bit > and x2APIC MSRs (at least on upstream KVM, don't know if Google's > userspace MSR patches can do it). > > Therefore it makes no sense to allow the "virtualize APIC accesses" > control for L1, as the control implies the availability of the MSRs. The L1 guest doesn't have to have the x2APIC CPUID bit or the x2APIC MSRs in order for it to present these features to L2 using "virtualize x2APIC mode" and "APIC-register virtualization." Section 29.5 of the SDM (volume 3) indicates that the local APIC need not be in x2APIC mode for x2APIC virtualization to be effective. >> I'm also not sure that >> Hyper-V SynIC activation for L1 has any bearing on whether or not L0 >> can use the APICv features of the hardware when running L2. > > I agree with this. > > Paolo
