Hi, This series aims to fix issue of exposing APICv features to L1 when enable_apicv==false in L0. The first patch is just a refactoring of existing code. It replaces updating of VMX APICv related secondary exec controls, in generic secondary exec control re-computation. This is done to avoid code-duplication which is error-prone. The second patch makes sure that if APICv is disabled dynamically when Hyper-V SynIC is enabled, then also make sure to not expose APICv features to L1 in VMX MSRs. The third patch fix a bug of exposing some APICv related features to L1 even though APICv is disabled in L0. Regards, -Arbel Moshe
