On Mon, Jun 06, 2016 at 04:12:03PM +0200, Andrew Jones wrote: > > +/* > > + * BAR number in all BAR access functions below is a number of 32-bit > > + * register starting from PCI_BASE_ADDRESS_0 offset. > > + * > > + * In cases BAR size is 64-bit a caller should still provide BAR number > > + * in terms of 32-bit words. For example, if a device has 64-bit BAR#0 > > + * and 32-bit BAR#1 the caller should provide 2 to address BAR#1, not 1. > > Is this how people label bars? I.e. they call a bar following a 64-bit > bar BAR#N+1? Or do they skip numbers with the labels to match the > offsets? I.e. in this example you'd say BAR#0 (64-bit), there is no BAR#1, > and then BAR#2 (32-bit) when labeling? I do not think there is an agreed notation here. I would guess, when it comes to a particular device people label registers as described in the device specification. But I can easily imagine specifications using both ways. > Thanks, > drew -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
