On Tue, Sep 01, 2015 at 11:37:13AM +0800, Jason Wang wrote:
>
>
> On 08/30/2015 05:12 PM, Michael S. Tsirkin wrote:
> > Even when we skip data decoding, MMIO is slightly slower
> > than port IO because it uses the page-tables, so the CPU
> > must do a pagewalk on each access.
> >
> > This overhead is normally masked by using the TLB cache:
> > but not so for KVM MMIO, where PTEs are marked as reserved
> > and so are never cached.
> >
> > As ioeventfd memory is never read, make it possible to use
> > RO pages on the host for ioeventfds, instead.
> > The result is that TLBs are cached, which finally makes MMIO
> > as fast as port IO.
> >
> > Signed-off-by: Michael S. Tsirkin <mst@xxxxxxxxxx>
> > ---
> > arch/x86/kvm/vmx.c | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> > index 9d1bfd3..ed44026 100644
> > --- a/arch/x86/kvm/vmx.c
> > +++ b/arch/x86/kvm/vmx.c
> > @@ -5745,6 +5745,11 @@ static int handle_ept_violation(struct kvm_vcpu *vcpu)
> > vmcs_set_bits(GUEST_INTERRUPTIBILITY_INFO, GUEST_INTR_STATE_NMI);
> >
> > gpa = vmcs_read64(GUEST_PHYSICAL_ADDRESS);
> > + if (!kvm_io_bus_write(vcpu, KVM_FAST_MMIO_BUS, gpa, 0, NULL)) {
> > + skip_emulated_instruction(vcpu);
> > + return 1;
> > + }
> > +
> > trace_kvm_page_fault(gpa, exit_qualification);
> >
> > /* It is a write fault? */
>
> Just notice that vcpu_mmio_write() tries lapic first. Should we do the
> same here? Otherwise we may slow down apic access consider we may have
> hundreds of eventfds.
IIUC this does not affect mmio at all: for mmio we set
reserved page flag, so they trigger an EPT misconfiguration,
not an EPT violation.
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