Re: kvm-unit-tests: add tscdeadline-latency test

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On 10/12/2014 21:23, Marcelo Tosatti wrote:
> 
> To test latency between TSC deadline timer 
> interrupt injection.
> 
> Signed-off-by: Marcelo Tosatti <mtosatti@xxxxxxxxxx>
> 
> Index: kvm-unit-tests/config/config-x86-common.mak
> ===================================================================
> --- kvm-unit-tests.orig/config/config-x86-common.mak	2014-06-27 13:43:43.694257143 -0300
> +++ kvm-unit-tests/config/config-x86-common.mak	2014-12-10 16:10:41.715339378 -0200
> @@ -69,6 +69,8 @@
>  
>  $(TEST_DIR)/apic.elf: $(cstart.o) $(TEST_DIR)/apic.o
>  
> +$(TEST_DIR)/tscdeadline-latency.elf: $(cstart.o) $(TEST_DIR)/tscdeadline-latency.o
> +
>  $(TEST_DIR)/init.elf: $(cstart.o) $(TEST_DIR)/init.o
>  
>  $(TEST_DIR)/realmode.elf: $(TEST_DIR)/realmode.o
> Index: kvm-unit-tests/config/config-x86_64.mak
> ===================================================================
> --- kvm-unit-tests.orig/config/config-x86_64.mak	2014-12-10 16:03:20.609681443 -0200
> +++ kvm-unit-tests/config/config-x86_64.mak	2014-12-10 16:10:25.172352577 -0200
> @@ -9,5 +9,6 @@
>  	  $(TEST_DIR)/pcid.flat $(TEST_DIR)/debug.flat
>  tests += $(TEST_DIR)/svm.flat
>  tests += $(TEST_DIR)/vmx.flat
> +tests += $(TEST_DIR)/tscdeadline-latency.flat
>  
>  include config/config-x86-common.mak
> Index: kvm-unit-tests/x86/tscdeadline-latency.c
> ===================================================================
> --- /dev/null	1970-01-01 00:00:00.000000000 +0000
> +++ kvm-unit-tests/x86/tscdeadline-latency.c	2014-12-10 18:21:38.151253344 -0200
> @@ -0,0 +1,110 @@
> +/*
> + * qemu command line | grep latency | cut -f 2 -d ":" > latency
> + *
> + * In octave:
> + * load latency
> + * min(list)
> + * max(list)
> + * mean(list)
> + * hist(latency, 50)
> + */
> +
> +#include "libcflat.h"
> +#include "apic.h"
> +#include "vm.h"
> +#include "smp.h"
> +#include "desc.h"
> +#include "isr.h"
> +#include "msr.h"
> +
> +static void test_lapic_existence(void)
> +{
> +    u32 lvr;
> +
> +    lvr = apic_read(APIC_LVR);
> +    printf("apic version: %x\n", lvr);
> +    report("apic existence", (u16)lvr == 0x14);
> +}
> +
> +#define TSC_DEADLINE_TIMER_MODE (2 << 17)
> +#define TSC_DEADLINE_TIMER_VECTOR 0xef
> +#define MSR_IA32_TSC            0x00000010
> +#define MSR_IA32_TSCDEADLINE    0x000006e0
> +
> +static int tdt_count;
> +u64 exptime;
> +int delta;
> +#define TABLE_SIZE 10000
> +u64 table[TABLE_SIZE];
> +volatile int table_idx;
> +
> +static void tsc_deadline_timer_isr(isr_regs_t *regs)
> +{
> +    u64 now = rdtsc();
> +    ++tdt_count;
> +
> +    if (table_idx < TABLE_SIZE && tdt_count > 1)
> +        table[table_idx++] = now - exptime;
> +
> +    exptime = now+delta;
> +    wrmsr(MSR_IA32_TSCDEADLINE, now+delta);
> +    apic_write(APIC_EOI, 0);
> +}
> +
> +static void start_tsc_deadline_timer(void)
> +{
> +    handle_irq(TSC_DEADLINE_TIMER_VECTOR, tsc_deadline_timer_isr);
> +    irq_enable();
> +
> +    wrmsr(MSR_IA32_TSCDEADLINE, rdmsr(MSR_IA32_TSC)+delta);
> +    asm volatile ("nop");
> +}
> +
> +static int enable_tsc_deadline_timer(void)
> +{
> +    uint32_t lvtt;
> +
> +    if (cpuid(1).c & (1 << 24)) {
> +        lvtt = TSC_DEADLINE_TIMER_MODE | TSC_DEADLINE_TIMER_VECTOR;
> +        apic_write(APIC_LVTT, lvtt);
> +        start_tsc_deadline_timer();
> +        return 1;
> +    } else {
> +        return 0;
> +    }
> +}
> +
> +static void test_tsc_deadline_timer(void)
> +{
> +    if(enable_tsc_deadline_timer()) {
> +        printf("tsc deadline timer enabled\n");
> +    } else {
> +        printf("tsc deadline timer not detected\n");
> +    }
> +}
> +
> +int main()
> +{
> +    int i;
> +
> +    setup_vm();
> +    smp_init();
> +    setup_idt();
> +
> +    test_lapic_existence();
> +
> +    mask_pic_interrupts();
> +
> +    delta = 200000;
> +    test_tsc_deadline_timer();
> +    irq_enable();
> +
> +    do {
> +        asm volatile("hlt");
> +    } while (table_idx < TABLE_SIZE);
> +
> +    for (i = 0; i < TABLE_SIZE; i++)
> +        printf("latency: %d\n", table[i]);
> +
> +    return report_summary();
> +}
> Index: kvm-unit-tests/x86/unittests.cfg
> ===================================================================
> --- kvm-unit-tests.orig/x86/unittests.cfg	2014-12-10 16:03:20.616681437 -0200
> +++ kvm-unit-tests/x86/unittests.cfg	2014-12-10 16:15:23.145114609 -0200
> @@ -161,3 +161,8 @@
>  [debug]
>  file = debug.flat
>  arch = x86_64
> +
> +[tscdeadline_latency]
> +file = tscdeadline_latency.flat
> +extra_params = -cpu qemu64,+tsc-deadline
> +arch = x86_64
> --
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> 

Applied, thanks.  Here is a script I use to run it:

#! /bin/sh
time ./x86/run x86/tscdeadline-latency.flat -cpu host | sed -n 's/^latency: //p' > l.txt
time ./x86/run x86/tscdeadline-latency.flat -append '2000000 4000' -cpu host | sed -n 's/^latency: //p' > l2.txt
time ./x86/run x86/tscdeadline-latency.flat -append '4000000 2000' -cpu host | sed -n 's/^latency: //p' > l3.txt

gnuplot << \EOF
  hist(x,width)=width*floor(x/width) + binwidth/2.0

  binwidth=500
  set xrange [0:50000]
  set boxwidth binwidth
  set term png size 1024,512
  set output "200000,10000.png"
  plot 'l.txt' using (hist($1,binwidth)):(1.0/10000) smooth freq with boxes

  binwidth=3000
  set xrange [0:500000]
  set boxwidth binwidth
  set term png size 1024,512
  set output "2000000,4000.png"
  plot 'l2.txt' using (hist($1,binwidth)):(1.0/4000) smooth freq with boxes

  binwidth=3000
  set xrange [0:500000]
  set boxwidth binwidth
  set term png size 1024,512
  set output "4000000,2000.png"
  plot 'l3.txt' using (hist($1,binwidth)):(1.0/2000) smooth freq with boxes
EOF

and I attach the plots I get with a non-realtime kernel.  I'll try a
realtime kernel tomorrow; in the meanwhile, can you attach the three
plots you get on your machine too (RT), so that we can be sure we're
looking at the same thing?

Paolo

Attachment: 200000,10000.png
Description: PNG image

Attachment: 2000000,4000.png
Description: PNG image

Attachment: 4000000,2000.png
Description: PNG image


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