Re: [question] lots of interrupts injected to vm when pressing some key w/o releasing

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On 21/11/2014 15:20, Zhang, Yang Z wrote:
> Zhang Haoyu wrote on 2014-11-20:
>> Hi all,
>>
>> If I press the one of "Insert/Delete/Home/End/PageUp/PageDown/UpArrow/
>> DownArrow/LeftArrow/RightArrow" key w/o releasing, then lots of
>> interrupts will be injected to vm(win7/win2008), about 8000/s, the
>> system become very slow, bringing very bad experience. But the other keys are okay.
>> And, linux guest has no this problem.
>>
>> If I remove the commit of 0bc830b05c667218d703f2026ec866c49df974fc, then
>> the problem disappeared, but win7 guest got stuck at booting stage. And
>> so strange that If the vm has only one vcpu, then the problem also
>> disappeared.
>>
>> Any ideas?
> 
> It looks commit 0bc830 doesn't do the right thing. The right point
> to clear an edge triggered interrupt in ioapic->irr is after userspace
> changes the irq line status. Otherwise, there may cause interrupt storm
> if a device sets the irq line in a fix edge continuously. 
>
> See below code:
> ioapic_set_irq:
> 	.....
>     old_irr = ioapic->irr;
>     ioapic->irr |= mask;
>     if ((edge && old_irr == ioapic->irr) ||
>         (!edge && entry.fields.remote_irr)) { 
>         ret = 0;						 // normally, we should break from here. But we never go to here due to (edge && old_irr != ioapic->irr) now.
>         goto out;
>     }   

The IRR register means an interrupt was received and not serviced yet,
similar to the LAPIC or PIC register.  It is not the same thing as the
interrupt line level (it happens to be for level-triggered interrupts).

We observed lost interrupts during migration, and fixing the semantics
of IRR was necessary in order to reinject those properly (commit
673f7b4257).  If QEMU sends KVM_IRQ_LINE twice with level=1 it should be
fixed---it is not supposed to do so.  Commit 0bc830b05 makes the kernel
IOAPIC behave the same way as QEMU's.

If you want the old semantics of KVM_IRQ_LINE, that requires a separate
register, different from IRR but it is not easy because they were buggy:
the level of the interrupt is not part of the IOAPIC state structs in
KVM, and it is not migrated in QEMU either.

Paolo
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