2014-10-01 22:16+0300, Nadav Amit: > On Oct 1, 2014, at 9:27 PM, Radim Krčmář <rkrcmar@xxxxxxxxxx> wrote: > > Our assumption that all have the same mode is horrible. > > (Do they all have be the same?) > Yes: "All processors that have their APIC software enabled (using the spurious vector enable/disable bit) must have their DFRs (Destination Format Registers) programmed identically." Thanks. > > The only thing we allow out of your scenario that I can see is software > > disabled x2apic after enabled clustered xapic processors and that > > doesn't need two loops, just a sw check at x2apic. > > Practically, it is a harmless bug :) > So does xsa-108... ;-) > Now seriously: First, the bug may affect certain cases of cpu hot-plug, etc. > Second, there are additional implications. Consider a situation in which the first VCPUs have lapic disabled, and they do not have the same DFR/x2apic mode as the rest of the VCPUs. (I coudn't find anything that would affect the host.) > This is ok according to the SDM, but in such case, the logical map they would have would not match the spic-mode. Therefore, they may not receive NMIs, INIT, etc. - which they should regardless to the fact their LAPIC is disabled. The guest wouldn't work, more suprising is that it usually does ;) I'll rewrite it later if you are pressed for other stuff. -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
