On Mon, 2019-06-24 at 21:48 +1000, Michael Ellerman wrote:
> Michael Neuling <mikey@xxxxxxxxxxx> writes:
> > When emulating tsr, treclaim and trechkpt, we incorrectly set CR0. The
> > code currently sets:
> > CR0 <- 00 || MSR[TS]
> > but according to the ISA it should be:
> > CR0 <- 0 || MSR[TS] || 0
>
> Seems bad, what's the worst case impact?
It's a data integrity issue as CR0 is corrupted.
> Do we have a test case for this?
Suraj has a KVM unit test for it.
> > This fixes the bit shift to put the bits in the correct location.
>
> Fixes: ?
It's been around since we first wrote the code so:
Fixes: 4bb3c7a0208fc13c ("KVM: PPC: Book3S HV: Work around transactional memory bugs in POWER9")
Mikey
