Xu, Anthony wrote:
Xiantao and I have found the root cause,
Qemu emulates PIIX chipset, all pci devices can only use irq 10.11,
which is confiured inside chipset interrupt routing table. Even though
IOAPIC have 24 interrupt pins.
While KVM/IA64 use the same Guest Firmware with what XEN/IA64 which use
different "interrupt routing algorithm".
Means the pci device irq doesn't match between qemu and Guest Firmware
in KVM/IA64. So guest didn't get pci device interrupt.
Obviously there are two ways to fix it.
1. modify qemu side, all pci devices use irq larger than or equal to 16,
we need to come out an algorithm to calculate irq from pci device(bus
number,device number, function number),
then we also need to modify IA32 Guest BIOS to present the same pci
device irq (use same algorithm) to guest OS. Avi seems not want to
modify qemu a lot.
2. modify IA64 guest firmware, two pros, (1)all pci devices use only
10,11 two irqs, so if there are many pci device, there are a lot of
interrupt sharing, which impact performance negatively
(2) We need to maintain two versions fo IA64 guest firmwares, one
for KVM/IA64, the other for XEN/IA64, which is not what I want.
Hi Anthony,
I think option 2 is an obvious no-go solution. We can use 1 on the
short term, but for the longer term we definately need more than two
interrupts shared between the devices. I can very well imagine
situations where we want to have bigger setups so two virtual interrupts
even though they are just virtual, will completely kill the system.
I think doing some surgery to qemu here is unavoidable - I'll volunteer
to shake Avi and Anthony Liguori until they give in :-)
Cheers,
Jes
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