On Sat, 14 May 2022 11:25:24 +0100, Marc Zyngier wrote:
> Unsusprisingly, Apple M1 Pro/Max have the exact same defect as the
> original M1 and generate random SErrors in the host when a guest
> tickles the GICv3 CPU interface the wrong way.
>
> Add the part numbers for both the CPU types found in these two
> new implementations, and add them to the hall of shame. This also
> applies to the Ultra version, as it is composed of 2 Max SoCs.
Applied to next, thanks!
[1/1] KVM: arm64: vgic-v3: List M1 Pro/Max as requiring the SEIS workaround
commit: cae889302ebf5a9b22ca3580996118b8d20b3ae6
Cheers,
M.
--
Without deviation from the norm, progress is not possible.
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