On Fri, 18 Jun 2021 11:51:39 +0100, Alexandru Elisei wrote:
> According to ARM DDI 0487G.a, page D13-3895, setting the PMCR_EL0.P bit to
> 1 has the following effect:
>
> "Reset all event counters accessible in the current Exception level, not
> including PMCCNTR_EL0, to zero."
>
> Similar behaviour is described for AArch32 on page G8-7022. Make it so.
Applied to kvm-arm64/pmu-fixes, thanks!
[1/1] KVM: arm64: Don't zero the cycle count register when PMCR_EL0.P is set
commit: 2a71fabf6a1bc9162a84e18d6ab991230ca4d588
Cheers,
M.
--
Without deviation from the norm, progress is not possible.
_______________________________________________
kvmarm mailing list
kvmarm@xxxxxxxxxxxxxxxxxxxxx
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
