On Thu, Apr 30, 2020 at 08:29:44AM +0530, Anshuman Khandual wrote: > On 04/30/2020 02:56 AM, Will Deacon wrote: > > On Wed, Apr 29, 2020 at 03:07:15PM +0530, Anshuman Khandual wrote: > >> On 04/14/2020 03:18 PM, Anshuman Khandual wrote: > >>> Changes in V2: > >>> > >>> - Added Suggested-by tag from Mark Rutland for all changes he had proposed > >>> - Added comment for SpecSEI feature on why it is HIGHER_SAFE per Suzuki > >>> - Added a patch which makes ID_AA64DFR0_DOUBLELOCK a signed feature per Suzuki > >>> - Added ID_DFR1 and ID_MMFR5 system register definitions per Will > >>> - Added remaining features bits for relevant 64 bit system registers per Will > >>> - Changed commit message on [PATCH 5/7] regarding TraceFilt feature per Suzuki > >>> - Changed ID_PFR2.CSV3 (FTR_STRICT -> FTR_NONSTRICT) as 64 bit registers per Will > >>> - Changed ID_PFR0.CSV2 (FTR_STRICT -> FTR_NONSTRICT) as 64 bit registers per Will > >>> - Changed some commit messages > >> > >> Just a gentle ping. I am wondering if you had a chance to glance > >> through this updated series. > > > > Please can you resend based on for-next/cpufeature? > > Sure, will do. Thanks. I'll keep an eye out for them. Will _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
