On 04/14/2020 03:18 PM, Anshuman Khandual wrote: > This series is primarily motivated from an adhoc list from Mark Rutland > during our previous ID_ISAR6 discussion [1]. The current proposal also > accommodates some more suggestions from Will and Suzuki. > > This series adds missing 32 bit system registers (ID_PFR2, ID_DFR1 and > ID_MMFR5), adds missing features bits on all existing system registers > (32 and 64 bit) and some other miscellaneous changes. While here it also > includes a patch which does macro replacement for various open bits shift > encodings for various CPU ID registers. There is a slight re-order of the > patches here as compared to the previous version (V1). > > This series is based on v5.7-rc1. All feature bits enabled here can be > referred in ARM DDI 0487F.a specification. Though I have tried to select > appropriate values for each new feature being added here, there might be > some inconsistencies (or mistakes). In which case, please do let me know > if anything needs to change. Thank you. > > [1] https://patchwork.kernel.org/patch/11287805/ > > Cc: Catalin Marinas <catalin.marinas@xxxxxxx> > Cc: Will Deacon <will@xxxxxxxxxx> > Cc: Mark Rutland <mark.rutland@xxxxxxx> > Cc: Marc Zyngier <maz@xxxxxxxxxx> > Cc: James Morse <james.morse@xxxxxxx> > Cc: Suzuki K Poulose <suzuki.poulose@xxxxxxx> > Cc: kvmarm@xxxxxxxxxxxxxxxxxxxxx > Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx > Cc: linux-kernel@xxxxxxxxxxxxxxx > > Changes in V2: > > - Added Suggested-by tag from Mark Rutland for all changes he had proposed > - Added comment for SpecSEI feature on why it is HIGHER_SAFE per Suzuki > - Added a patch which makes ID_AA64DFR0_DOUBLELOCK a signed feature per Suzuki > - Added ID_DFR1 and ID_MMFR5 system register definitions per Will > - Added remaining features bits for relevant 64 bit system registers per Will > - Changed commit message on [PATCH 5/7] regarding TraceFilt feature per Suzuki > - Changed ID_PFR2.CSV3 (FTR_STRICT -> FTR_NONSTRICT) as 64 bit registers per Will > - Changed ID_PFR0.CSV2 (FTR_STRICT -> FTR_NONSTRICT) as 64 bit registers per Will > - Changed some commit messages Hello Will, Just a gentle ping. I am wondering if you had a chance to glance through this updated series. - Anshuman _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm