> > This gets more fun when you consider the context-aware breakpoints are > > the highest numbered. So the set of (context-aware) breakpoints might > > not intersect across all CPUs. > > I didn't see a reference to that in the ARM ARM. It seemed to imply any > breakpoint could be context aware is .BT was appropriately set and > linked to the VR. The existence of ID_AA64_DFR0_EL1.CTX_CMPs implies otherwise, though I haven't dug much deeper. Thanks, Mark. _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
