On Fri, Apr 25, 2014 at 01:45:56PM +0100, Marc Zyngier wrote: > On 24/04/14 23:43, Adhyas Avasthi wrote: > > This list does not seem to get too much traffic anymore. Still if > > someone is listening, can you please help me get answers to the > > following questions ? > > 385 emails this month so far doesn't look to bad. I suggest you look in > the archives to find out what you've missed. > > > -> I finished reading the ASPLOS 2014 paper on KVM on ARM. The design > > primarily talks about a single CPU/core machine. Can someone describe > > the transitions (what states are saved, how it works) in the case of > > multi-core hosts and guests ? > > Why would you expect the context to be different? > That was not the intent with the paper, in fact we address multicore issues throughout the paper. However, as each CPU core is an independent execution unit (except for shared memory semantics and inter-processor interrupts), we have described the flow from the point of view of a single core in the paper. Each core in a multicore system follows the same sequence of events for, for example, performing a world-switch. -Christoffer > > -> Does KVM on ARM with qemu support directed PCI passthrough or plan > > to support it in near future ? If yes, what is the equivalent of > > iommu to control dma and irq redirections ? > > Work in progress. The SMMU is what we use for device isolation, DMA > mapping. As for IRQ remapping, there isn't much to do there, as we only > inject virtual interrupts so far (GICv4 will change this, though A15 > won't support it). > > M. _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
