On Mon, Mar 24, 2014 at 04:33:22PM +0000, Peter Maydell wrote: > On 24 March 2014 16:23, Marc Zyngier <marc.zyngier@xxxxxxx> wrote: > > On 2014-03-24 16:04, Rob Herring wrote: > >> different DT for virt machine model depending on KVM vs. TCG. Another > >> approach would be the TCG PSCI emulation (which I'm implementing) > >> could trap and handle hvc calls instead, but I don't recall if the > >> architecture can support that as easily. > > > To what exception level do you expect to trap? If your PSCI code > > conceptually sits at EL2, that's fine. If you're at EL3, you're in trouble. > > For the case where we're just running a VM in a an > emulated CPU that has only EL0 and EL1 I see no reason > why TCG can't trap the HVC calls and have PSCI at EL2. > (There's zero code difference, it's just a matter of > which instruction we put in a special-case emulation for.) > > More interesting is what we do as and when we > implement real emulation of EL2 and/or EL3. True > emulated EL3 at least is something I expect to see > work on this year (there are already Samsung patches > on-list from last December). Yes, we have an assignee (Greg Bellows) from Qualcomm who just joined Linaro and will start working on this today'ish. > But then PSCI via SMC > runs into the same issues. We may want a CPU property > to say "emulate EL2/EL3 or don't", with the expectation > that for the typical VM (and certainly for VMs that > migrate between TCG and KVM!) this is set to "only > emulate EL0/EL1, start in EL1". > > Is an "emulate EL2/EL3 always but special case PSCI > and only enter emulated EL2/EL3 if PSCI emulation > doesn't handle the call" approach even slightly sane? > It's how we do semihosting but I'm rather dubious > that the same approach wouldn't have nasty problems > for PSCI. > Would a reasonable scheme be, if a user provides a firmware blob (or enable some other secure options via command-line-options) then that overrides PSCI handling for SMC calls and if that needs to be supported, the supplied firmware must somehow work with qemu/kvm to support that. In all other cases, we trap for both hvc and smc and emulate PSCI? -Christoffer _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
