Hi All, We would like to know KVM ARM/ARM64 plans for handling host implementation specific registers when underlying host cpu is different from guest cpu. These host implementation specific registers can be of two types: 1. Trappable 2. Non-trappable Trappable host implementation specific registers can be easily handled by simply not allowing guest to access them. Non-trappable host implementation specific register are tricky to handle since, we cannot trap guest access to these registers. One potential solution for this would be to save/restore them in the low-level context switching routines and KVM VCPU context can have some scratch space to save/restore host implementation specific registers. The reason for bringing up this issue is that we have few implementation specific registers in APM ARMv8 CPU which cannot be trapped upon guest access. Regards, Anup _______________________________________________ kvmarm mailing list kvmarm@xxxxxxxxxxxxxxxxxxxxx https://lists.cs.columbia.edu/cucslists/listinfo/kvmarm
