This will break QEMU: it now needs to use the
KVM_GET_MSR_INDEX_LIST/KVM_GET_MSRS/KVM_SET_MSRS ioctls, and also by
changing the structure size, we change the KVM_SET_REGS/KVM_GET_REGS
ioctl numbers.
Signed-off-by: Rusty Russell <rusty.russell@xxxxxxxxxx>
diff --git a/arch/arm/include/asm/kvm.h b/arch/arm/include/asm/kvm.h
index b928a24..d040a2a 100644
--- a/arch/arm/include/asm/kvm.h
+++ b/arch/arm/include/asm/kvm.h
@@ -57,15 +57,6 @@ struct kvm_regs {
__u32 reg15;
__u32 cpsr;
__u32 spsr[5]; /* Banked SPSR, indexed by MODE_ */
- struct {
- __u32 c0_midr;
- __u32 c1_sys;
- __u32 c2_base0;
- __u32 c2_base1;
- __u32 c2_control;
- __u32 c3_dacr;
- } cp15;
-
};
/* Supported Processor Types */
diff --git a/arch/arm/kvm/guest.c b/arch/arm/kvm/guest.c
index 77e8a65..7215305 100644
--- a/arch/arm/kvm/guest.c
+++ b/arch/arm/kvm/guest.c
@@ -70,17 +70,6 @@ int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
regs->reg15 = vcpu_regs->pc;
regs->cpsr = vcpu_regs->cpsr;
-
- /*
- * Co-processor registers.
- */
- regs->cp15.c0_midr = vcpu->arch.cp15[c0_MIDR];
- regs->cp15.c1_sys = vcpu->arch.cp15[c1_SCTLR];
- regs->cp15.c2_base0 = vcpu->arch.cp15[c2_TTBR0];
- regs->cp15.c2_base1 = vcpu->arch.cp15[c2_TTBR1];
- regs->cp15.c2_control = vcpu->arch.cp15[c2_TTBCR];
- regs->cp15.c3_dacr = vcpu->arch.cp15[c3_DACR];
-
return 0;
}
@@ -114,12 +103,6 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
vcpu_regs->abt_regs[2] = regs->spsr[MODE_ABT];
vcpu_regs->und_regs[2] = regs->spsr[MODE_UND];
- /*
- * Co-processor registers.
- */
- vcpu->arch.cp15[c0_MIDR] = regs->cp15.c0_midr;
- vcpu->arch.cp15[c1_SCTLR] = regs->cp15.c1_sys;
-
vcpu_regs->pc = regs->reg15;
vcpu_regs->cpsr = regs->cpsr;
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