On Tue, Jun 21, 2016 at 01:48:23PM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> > > No need for local struct drm_device * since dev_priv is the > correct thing to pass in to NEEDS_WaRsDisableCoarsePowerGating > anyway. Changed the macro definition for the latter to reflect > that as well. > > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> > Cc: Dave Gordon <david.s.gordon@xxxxxxxxx> Reviewed-by: Daniel Vetter <daniel.vetter@xxxxxxxx> > --- > drivers/gpu/drm/i915/i915_drv.h | 7 ++++--- > drivers/gpu/drm/i915/i915_guc_submission.c | 3 +-- > 2 files changed, 5 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 48928227bdcc..3775d26ac573 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -2788,9 +2788,10 @@ struct drm_i915_cmd_table { > #define HAS_BROKEN_CS_TLB(dev) (IS_I830(dev) || IS_845G(dev)) > > /* WaRsDisableCoarsePowerGating:skl,bxt */ > -#define NEEDS_WaRsDisableCoarsePowerGating(dev) (IS_BXT_REVID(dev, 0, BXT_REVID_A1) || \ > - IS_SKL_GT3(dev) || \ > - IS_SKL_GT4(dev)) > +#define NEEDS_WaRsDisableCoarsePowerGating(dev_priv) (IS_BXT_REVID(dev_priv, \ > + 0, BXT_REVID_A1) || \ > + IS_SKL_GT3(dev_priv) || \ > + IS_SKL_GT4(dev_priv)) > > /* > * dp aux and gmbus irq on gen4 seems to be able to generate legacy interrupts > diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c > index 22a55ac4e51c..643bc3b2e3b8 100644 > --- a/drivers/gpu/drm/i915/i915_guc_submission.c > +++ b/drivers/gpu/drm/i915/i915_guc_submission.c > @@ -153,12 +153,11 @@ static int host2guc_sample_forcewake(struct intel_guc *guc, > struct i915_guc_client *client) > { > struct drm_i915_private *dev_priv = guc_to_i915(guc); > - struct drm_device *dev = dev_priv->dev; > u32 data[2]; > > data[0] = HOST2GUC_ACTION_SAMPLE_FORCEWAKE; > /* WaRsDisableCoarsePowerGating:skl,bxt */ > - if (!intel_enable_rc6() || NEEDS_WaRsDisableCoarsePowerGating(dev)) > + if (!intel_enable_rc6() || NEEDS_WaRsDisableCoarsePowerGating(dev_priv)) > data[1] = 0; > else > /* bit 0 and 1 are for Render and Media domain separately */ > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx