On Thu, Jun 16, 2016 at 10:49:17AM +0200, Michał Winiarski wrote: > On Fri, Jun 03, 2016 at 05:36:31PM +0100, Chris Wilson wrote: > > Make sure that the RPS bottom-half is flushed before we set the idle > > frequency when we decide the GPU is idle. This should prevent any races > > with the bottom-half and setting the idle frequency, and ensures that > > the bottom-half is bounded by the GPU's rpm reference taken for when it > > is active (i.e. between gen6_rps_busy() and gen6_rps_idle()). > > > > v2: Avoid recursively using the i915->wq - RPS does not touch the > > struct_mutex so has no place being on the ordered i915->wq. > > v3: Enable/disable interrupts for RPS busy/idle in order to prevent > > further HW access from RPS outside of the wakeref. > > The race can be easily observed since: > > commit aed242ff7ebb697e4dff912bd4dc7ec7192f7581 > Author: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Date: Wed Mar 18 09:48:21 2015 +0000 > > drm/i915: Relax RPS contraints to allows setting minfreq on idle > > Because idle_freq != min_freq_softlimit for BDW and HSW - we see a failure in > pm_rps. Flushing RPS bottom-half partially fixes that. We need to either modify > the test to match the current behaviour, or switch back to min_freq_softlimit > as soon as we transition idle->active. Ensuring we are at or above min_freq_softlimit from gen6_rps_busy() is not a bad plan, that matches the user expectations. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
