On Wed, Jun 01, 2016 at 07:54:42AM +0100, Chris Wilson wrote: > On Tue, May 31, 2016 at 04:18:34PM -0700, Matt Roper wrote: > > On Tue, May 31, 2016 at 09:51:53AM +0100, Chris Wilson wrote: > > > On Tue, May 31, 2016 at 01:58:27PM +0530, Sagar Arun Kamble wrote: > > > > On Loading, GuC sets PM interrupts routing (bit 31) and clears ARAT > > > > expired interrupt (bit 9). Host turbo also updates this register > > > > in RPS flows. This patch ensures bit 31 and bit 9 setup by GuC persists. > > > > ARAT timer interrupt is needed in GuC for various features. It also > > > > facilitates halting GuC and hence achieving RC6. PM interrupt routing > > > > will not impact RPS interrupt reception by host as GuC will redirect > > > > them. > > > > This patch fixes igt test pm_rc6_residency that was failing with guc > > > > load/submission enabled. Tested with SKL GuC v6.1 and BXT GuC v5.1 and v8.7. > > > > > > > > v2: i915_irq/i915_pm decoupling from intel_guc. (ChrisW) > > > > > > > > v3: restructuring the mask update and rebase w.r.t Ville's patch. (ChrisW) > > > > > > > > v4: Updating the pm_intr_keep during direct_interrupts_to_guc. (Sagar) > > > > > > > > Cc: Chris Harris <chris.harris@xxxxxxxxx> > > > > Cc: Zhe Wang <zhe1.wang@xxxxxxxxx> > > > > Cc: Deepak S <deepak.s@xxxxxxxxx> > > > > Cc: Satyanantha, Rama Gopal M <rama.gopal.m.satyanantha@xxxxxxxxx> > > > > Cc: Akash Goel <akash.goel@xxxxxxxxx> > > > > Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@xxxxxxxxx> > > > > > > I can understand what you mean by this patch, perfect! > > > Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > > -Chris > > > > Testcase: igt/pm_rc6_residency > > Tested-by: Matt Roper <matthew.d.roper@xxxxxxxxx> > > > > Merged to dinq. Thanks for the patch and review. > > This was only the second patch, it also wants the first patch to always > use gen6_sanitize_pm_mask otherwise we loose the interrupt bypass from > gen6_rps_idle(). That should have been caught by the testcase... > -Chris Hmm, I guess is misunderstood the message thread flow here and didn't realize there was another patch necessary as well. I did find that just this one patch caused the IGT to start passing where it had failed before (on BXT), so not sure why I didn't run into problems. I did merge in a couple un-related TSC patches (required to keep my BXT stable in general) before testing, but I don't think that would have changed the behavior here. Matt > > -- > Chris Wilson, Intel Open Source Technology Centre -- Matt Roper Graphics Software Engineer IoTG Platform Enabling & Development Intel Corporation (916) 356-2795 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
