[PATCH 2/5] drm/i915: Convert L3 parity irq worker into a tasklet

[Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>]

Using a tasklet for an irq bottom-half is the preferred form as it
should ensure minimal latency from the irq to execution of the tasklet.

Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
Cc: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx>
Cc: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx>
---
 drivers/gpu/drm/i915/i915_drv.h |  2 +-
 drivers/gpu/drm/i915/i915_irq.c | 16 ++++++++--------
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b3b81c60bbb3..3a991bfce067 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1263,7 +1263,7 @@ struct i915_power_domains {
 #define MAX_L3_SLICES 2
 struct intel_l3_parity {
 	u32 *remap_info[MAX_L3_SLICES];
-	struct work_struct error_work;
+	struct tasklet_struct task;
 	int which_slice;
 };
 
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index a4ca9471f3f4..56f0410cf8e8 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1175,18 +1175,16 @@ out:
 
 
 /**
- * ivybridge_parity_work - Workqueue called when a parity error interrupt
- * occurred.
- * @work: workqueue struct
+ * ivybridge_parity_task - tasklet for the parity error interrupt
+ * @data: i915 device
  *
  * Doesn't actually do anything except notify userspace. As a consequence of
  * this event, userspace should try to remap the bad rows since statistically
  * it is likely the same row is more likely to go bad again.
  */
-static void ivybridge_parity_work(struct work_struct *work)
+static void ivybridge_parity_task(unsigned long data)
 {
-	struct drm_i915_private *dev_priv =
-		container_of(work, struct drm_i915_private, l3_parity.error_work);
+	struct drm_i915_private *dev_priv = (struct drm_i915_private *)data;
 	u32 error_status, row, bank, subbank;
 	char *parity_event[6];
 	uint32_t misccpctl;
@@ -1272,7 +1270,7 @@ static void ivybridge_parity_error_irq_handler(struct drm_i915_private *dev_priv
 	if (iir & GT_RENDER_L3_PARITY_ERROR_INTERRUPT)
 		dev_priv->l3_parity.which_slice |= 1 << 0;
 
-	queue_work(dev_priv->wq, &dev_priv->l3_parity.error_work);
+	tasklet_schedule(&dev_priv->l3_parity.task);
 }
 
 static void ilk_gt_irq_handler(struct drm_i915_private *dev_priv,
@@ -4572,7 +4570,9 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
 	tasklet_init(&dev_priv->rps.task,
 		     gen6_pm_rps_work,
 		     (unsigned long)dev_priv);
-	INIT_WORK(&dev_priv->l3_parity.error_work, ivybridge_parity_work);
+	tasklet_init(&dev_priv->l3_parity.task,
+		     ivybridge_parity_task,
+		     (unsigned long)dev_priv);
 
 	/* Let's track the enabled rps events */
 	if (IS_VALLEYVIEW(dev_priv))
-- 
2.8.1

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