On Wed, May 18, 2016 at 06:47:13PM +0200, Daniel Vetter wrote: > Not sure we can trust VBT on this one, but let's try. > > Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > Cc: Sonika Jindal <sonika.jindal@xxxxxxxxx> > Cc: Durgadoss R <durgadoss.r@xxxxxxxxx> > Cc: "Pandiyan, Dhinakaran" <dhinakaran.pandiyan@xxxxxxxxx> > Signed-off-by: Daniel Vetter <daniel.vetter@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_psr.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c > index 0295d8dd483f..a088be65a267 100644 > --- a/drivers/gpu/drm/i915/intel_psr.c > +++ b/drivers/gpu/drm/i915/intel_psr.c > @@ -315,6 +315,9 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp) > else > val |= EDP_PSR_TP1_TP2_SEL; > > + if (!dev_priv->vbt.psr.require_aux_wakeup) > + val |= EDP_PSR_SKIP_AUX_EXIT; At least on my HSW HSB machine that did the wrong thing apparently. I'll send out my patches to look at the DPCD as well here... > + > I915_WRITE(EDP_PSR_CTL, val); > > if (!dev_priv->psr.psr2_support) > -- > 2.8.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
