On ma, 2016-04-11 at 16:56 +0300, ville.syrjala@xxxxxxxxxxxxxxx wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Replace the hand rolled IMR/IER setup in > vlv_display_irq_postinstall() > with GEN5_IRQ_INIT(). Also rename the iir_mask to enable_mask to > avoid > consusion since we no longer deal with IIR here. > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Reviewed-by: Imre Deak <imre.deak@xxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_irq.c | 20 ++++++++------------ > 1 file changed, 8 insertions(+), 12 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c > b/drivers/gpu/drm/i915/i915_irq.c > index 678c6b86862e..f6815e47d8de 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -3303,7 +3303,7 @@ static void vlv_display_irq_reset(struct > drm_i915_private *dev_priv) > static void vlv_display_irq_postinstall(struct drm_i915_private > *dev_priv) > { > u32 pipestat_mask; > - u32 iir_mask; > + u32 enable_mask; > enum pipe pipe; > > pipestat_mask = PLANE_FLIP_DONE_INT_STATUS_VLV | > @@ -3313,18 +3313,14 @@ static void > vlv_display_irq_postinstall(struct drm_i915_private *dev_priv) > for_each_pipe(dev_priv, pipe) > i915_enable_pipestat(dev_priv, pipe, pipestat_mask); > > - iir_mask = I915_DISPLAY_PORT_INTERRUPT | > - I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | > - I915_DISPLAY_PIPE_B_EVENT_INTERRUPT; > + enable_mask = I915_DISPLAY_PORT_INTERRUPT | > + I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | > + I915_DISPLAY_PIPE_B_EVENT_INTERRUPT; > if (IS_CHERRYVIEW(dev_priv)) > - iir_mask |= I915_DISPLAY_PIPE_C_EVENT_INTERRUPT; > - dev_priv->irq_mask &= ~iir_mask; > - > - I915_WRITE(VLV_IIR, iir_mask); > - I915_WRITE(VLV_IIR, iir_mask); > - I915_WRITE(VLV_IER, ~dev_priv->irq_mask); > - I915_WRITE(VLV_IMR, dev_priv->irq_mask); > - POSTING_READ(VLV_IMR); > + enable_mask |= I915_DISPLAY_PIPE_C_EVENT_INTERRUPT; > + dev_priv->irq_mask = ~enable_mask; > + > + GEN5_IRQ_INIT(VLV_, dev_priv->irq_mask, enable_mask); > } > > /* drm_dma.h hooks _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx