On Tue, Mar 15, 2016 at 10:20:09AM +0100, Michał Winiarski wrote: > On gen8+ size of PIPE_CONTROL with Post Sync Operation should be 6 dwords. But gen8/gen9 still respect 5 for a dword write instead of a qword write. Please include an explanation of the impact. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
