From: Joe Konno <joe.konno@xxxxxxxxx> There are mechanisms for "set and return previous" underrun reporting state, but no convenience functions for simply getting the underrun reporting state for a particular pipe or pch transcoder. Signed-off-by: Joe Konno <joe.konno@xxxxxxxxx> --- drivers/gpu/drm/i915/intel_fifo_underrun.c | 43 ++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_fifo_underrun.c b/drivers/gpu/drm/i915/intel_fifo_underrun.c index bda526660e20..9516bd416226 100644 --- a/drivers/gpu/drm/i915/intel_fifo_underrun.c +++ b/drivers/gpu/drm/i915/intel_fifo_underrun.c @@ -297,6 +297,27 @@ bool intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private *dev_priv, } /** + * intel_get_cpu_fifo_underrun_reporting - get cpu fifo underrrun reporting state + * @dev_priv: i915 device instance + * @pipe: (CPU) pipe to get state for + * + * This function gets the fifo underrun reporting state for @pipe. + * + * Returns true if underrun reporting is enabled for @pipe. + */ +bool intel_get_cpu_fifo_underrun_reporting(struct drm_i915_private *dev_priv, + enum pipe pipe) +{ + struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + bool ret; + + ret = !intel_crtc->cpu_fifo_underrun_disabled; + + return ret; +} + +/** * intel_set_pch_fifo_underrun_reporting - set PCH fifo underrun reporting state * @dev_priv: i915 device instance * @pch_transcoder: the PCH transcoder (same as pipe on IVB and older) @@ -345,6 +366,28 @@ bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv, } /** + * intel_get_pch_fifo_underrun_reporting - get PCH fifo underrun reporting state + * @dev_priv: i915 device instance + * @pch_transcoder: the PCH transcoder (same as pipe on IVB and older) + * + * This function shows whether PCH fifo underrun reporting is enabled for + * @pch_transcoder. + * + * Returns true if PCH underrun reporting is enabled for @pch_transcoder. + */ +bool intel_get_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv, + enum transcoder pch_transcoder) +{ + struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pch_transcoder]; + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + bool ret; + + ret = !intel_crtc->pch_fifo_underrun_disabled; + + return ret; +} + +/** * intel_cpu_fifo_underrun_irq_handler - handle CPU fifo underrun interrupt * @dev_priv: i915 device instance * @pipe: (CPU) pipe to set state for -- 2.6.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx