On Wed, Jan 20, 2016 at 09:05:38PM +0200, ville.syrjala@xxxxxxxxxxxxxxx wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> intel_compute_tile_offset() and intel_add_fb_offsets() get passed the fb
> and the rotation. As both of those come from the plane state we can just
> pass that in instead.
>
> For extra consitency pass the plane state to intel_fb_xy_to_linear() as
> well even though it only really needs the fb.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Reviewed-by: Daniel Vetter <daniel.vetter@xxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_display.c | 35 ++++++++++++++++++++---------------
> drivers/gpu/drm/i915/intel_drv.h | 9 ++++-----
> drivers/gpu/drm/i915/intel_sprite.c | 22 +++++++++++-----------
> 3 files changed, 35 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index eb8ce8a99291..2e6cbf65b265 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2442,8 +2442,10 @@ static void intel_unpin_fb_obj(struct drm_framebuffer *fb, unsigned int rotation
> * with gen2/3, and 90/270 degree rotations isn't supported on any of them.
> */
> unsigned int intel_fb_xy_to_linear(int x, int y,
> - const struct drm_framebuffer *fb, int plane)
> + const struct intel_plane_state *state,
> + int plane)
> {
> + const struct drm_framebuffer *fb = state->base.fb;
> unsigned int cpp = drm_format_plane_cpp(fb->pixel_format, plane);
> unsigned int pitch = fb->pitches[plane];
>
> @@ -2456,11 +2458,12 @@ unsigned int intel_fb_xy_to_linear(int x, int y,
> * specify the start of scanout from the beginning of the gtt mapping.
> */
> void intel_add_fb_offsets(int *x, int *y,
> - const struct drm_framebuffer *fb, int plane,
> - unsigned int rotation)
> + const struct intel_plane_state *state,
> + int plane)
>
> {
> - const struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
> + const struct intel_framebuffer *intel_fb = to_intel_framebuffer(state->base.fb);
> + unsigned int rotation = state->base.rotation;
>
> if (intel_rotation_90_or_270(rotation)) {
> *x += intel_fb->rotated[plane].x;
> @@ -2561,10 +2564,12 @@ static u32 _intel_compute_tile_offset(const struct drm_i915_private *dev_priv,
> }
>
> unsigned int intel_compute_tile_offset(int *x, int *y,
> - const struct drm_framebuffer *fb, int plane,
> - unsigned int rotation)
> + const struct intel_plane_state *state,
> + int plane)
> {
> - const struct drm_i915_private *dev_priv = to_i915(fb->dev);
> + const struct drm_i915_private *dev_priv = to_i915(state->base.plane->dev);
> + const struct drm_framebuffer *fb = state->base.fb;
> + unsigned int rotation = state->base.rotation;
> unsigned int alignment = intel_surf_alignment(dev_priv, fb->modifier[plane]);
> unsigned int pitch;
>
> @@ -2989,11 +2994,11 @@ static void i9xx_update_primary_plane(struct drm_plane *primary,
> if (IS_G4X(dev))
> dspcntr |= DISPPLANE_TRICKLE_FEED_DISABLE;
>
> - intel_add_fb_offsets(&x, &y, fb, 0, rotation);
> + intel_add_fb_offsets(&x, &y, plane_state, 0);
>
> if (INTEL_INFO(dev)->gen >= 4)
> intel_crtc->dspaddr_offset =
> - intel_compute_tile_offset(&x, &y, fb, 0, rotation);
> + intel_compute_tile_offset(&x, &y, plane_state, 0);
>
> if (rotation == BIT(DRM_ROTATE_180)) {
> dspcntr |= DISPPLANE_ROTATE_180;
> @@ -3002,7 +3007,7 @@ static void i9xx_update_primary_plane(struct drm_plane *primary,
> y += (crtc_state->pipe_src_h - 1);
> }
>
> - linear_offset = intel_fb_xy_to_linear(x, y, fb, 0);
> + linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
>
> if (INTEL_INFO(dev)->gen < 4)
> intel_crtc->dspaddr_offset = linear_offset;
> @@ -3092,10 +3097,10 @@ static void ironlake_update_primary_plane(struct drm_plane *primary,
> if (!IS_HASWELL(dev) && !IS_BROADWELL(dev))
> dspcntr |= DISPPLANE_TRICKLE_FEED_DISABLE;
>
> - intel_add_fb_offsets(&x, &y, fb, 0, rotation);
> + intel_add_fb_offsets(&x, &y, plane_state, 0);
>
> intel_crtc->dspaddr_offset =
> - intel_compute_tile_offset(&x, &y, fb, 0, rotation);
> + intel_compute_tile_offset(&x, &y, plane_state, 0);
>
> if (rotation == BIT(DRM_ROTATE_180)) {
> dspcntr |= DISPPLANE_ROTATE_180;
> @@ -3106,7 +3111,7 @@ static void ironlake_update_primary_plane(struct drm_plane *primary,
> }
> }
>
> - linear_offset = intel_fb_xy_to_linear(x, y, fb, 0);
> + linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
>
> intel_crtc->adjusted_x = x;
> intel_crtc->adjusted_y = y;
> @@ -3314,8 +3319,8 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
> fb->pixel_format);
> }
>
> - intel_add_fb_offsets(&src_x, &src_y, fb, 0, rotation);
> - surf_addr = intel_compute_tile_offset(&src_x, &src_y, fb, 0, rotation);
> + intel_add_fb_offsets(&src_x, &src_y, plane_state, 0);
> + surf_addr = intel_compute_tile_offset(&src_x, &src_y, plane_state, 0);
>
> /* Sizes are 0 based */
> src_w--;
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index e3de1fc3b04d..09cfc0eea5a4 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1071,10 +1071,10 @@ void i915_audio_component_cleanup(struct drm_i915_private *dev_priv);
> /* intel_display.c */
> extern const struct drm_plane_funcs intel_plane_funcs;
> unsigned int intel_fb_xy_to_linear(int x, int y,
> - const struct drm_framebuffer *fb, int plane);
> + const struct intel_plane_state *state,
> + int plane);
> void intel_add_fb_offsets(int *x, int *y,
> - const struct drm_framebuffer *fb, int plane,
> - unsigned int rotation);
> + const struct intel_plane_state *state, int plane);
> unsigned int intel_rotation_info_size(const struct intel_rotation_info *rot_info);
> bool intel_has_pending_fb_unpin(struct drm_device *dev);
> int intel_pch_rawclk(struct drm_device *dev);
> @@ -1189,8 +1189,7 @@ void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, bool state);
> #define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
> #define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
> u32 intel_compute_tile_offset(int *x, int *y,
> - const struct drm_framebuffer *fb, int plane,
> - unsigned int rotation);
> + const struct intel_plane_state *state, int plane);
> void intel_prepare_reset(struct drm_device *dev);
> void intel_finish_reset(struct drm_device *dev);
> void hsw_enable_pc8(struct drm_i915_private *dev_priv);
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index 31be24f27207..ad533cc2b5f5 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -249,8 +249,8 @@ skl_update_plane(struct drm_plane *drm_plane,
> fb->pixel_format);
> }
>
> - intel_add_fb_offsets(&x, &y, fb, 0, rotation);
> - surf_addr = intel_compute_tile_offset(&x, &y, fb, 0, rotation);
> + intel_add_fb_offsets(&x, &y, plane_state, 0);
> + surf_addr = intel_compute_tile_offset(&x, &y, plane_state, 0);
>
> /* Sizes are 0 based */
> src_w--;
> @@ -426,8 +426,8 @@ vlv_update_plane(struct drm_plane *dplane,
> crtc_w--;
> crtc_h--;
>
> - intel_add_fb_offsets(&x, &y, fb, 0, rotation);
> - sprsurf_offset = intel_compute_tile_offset(&x, &y, fb, 0, rotation);
> + intel_add_fb_offsets(&x, &y, plane_state, 0);
> + sprsurf_offset = intel_compute_tile_offset(&x, &y, plane_state, 0);
>
> if (rotation == BIT(DRM_ROTATE_180)) {
> sprctl |= SP_ROTATE_180;
> @@ -436,7 +436,7 @@ vlv_update_plane(struct drm_plane *dplane,
> y += src_h;
> }
>
> - linear_offset = intel_fb_xy_to_linear(x, y, fb, 0);
> + linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
>
> if (key->flags) {
> I915_WRITE(SPKEYMINVAL(pipe, plane), key->min_value);
> @@ -557,8 +557,8 @@ ivb_update_plane(struct drm_plane *plane,
> if (crtc_w != src_w || crtc_h != src_h)
> sprscale = SPRITE_SCALE_ENABLE | (src_w << 16) | src_h;
>
> - intel_add_fb_offsets(&x, &y, fb, 0, rotation);
> - sprsurf_offset = intel_compute_tile_offset(&x, &y, fb, 0, rotation);
> + intel_add_fb_offsets(&x, &y, plane_state, 0);
> + sprsurf_offset = intel_compute_tile_offset(&x, &y, plane_state, 0);
>
> if (rotation == BIT(DRM_ROTATE_180)) {
> sprctl |= SPRITE_ROTATE_180;
> @@ -570,7 +570,7 @@ ivb_update_plane(struct drm_plane *plane,
> }
> }
>
> - linear_offset = intel_fb_xy_to_linear(x, y, fb, 0);
> + linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
>
> if (key->flags) {
> I915_WRITE(SPRKEYVAL(pipe), key->min_value);
> @@ -692,8 +692,8 @@ ilk_update_plane(struct drm_plane *plane,
> if (crtc_w != src_w || crtc_h != src_h)
> dvsscale = DVS_SCALE_ENABLE | (src_w << 16) | src_h;
>
> - intel_add_fb_offsets(&x, &y, fb, 0, rotation);
> - dvssurf_offset = intel_compute_tile_offset(&x, &y, fb, 0, rotation);
> + intel_add_fb_offsets(&x, &y, plane_state, 0);
> + dvssurf_offset = intel_compute_tile_offset(&x, &y, plane_state, 0);
>
> if (rotation == BIT(DRM_ROTATE_180)) {
> dvscntr |= DVS_ROTATE_180;
> @@ -702,7 +702,7 @@ ilk_update_plane(struct drm_plane *plane,
> y += src_h;
> }
>
> - linear_offset = intel_fb_xy_to_linear(x, y, fb, 0);
> + linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
>
> if (key->flags) {
> I915_WRITE(DVSKEYVAL(pipe), key->min_value);
> --
> 2.4.10
>
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> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
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--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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