Hi Lionel,
On 21 January 2016 at 15:03, Lionel Landwerlin
<lionel.g.landwerlin@xxxxxxxxx> wrote:
> + /* Workaround : Do not read or write the pipe palette/gamma data while
> + * GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled.
> + */
> + if (IS_HASWELL(dev) && intel_crtc->config->ips_enabled &&
> + ((I915_READ(GAMMA_MODE(pipe)) & GAMMA_MODE_MODE_MASK) ==
> + GAMMA_MODE_MODE_SPLIT)) {
> + hsw_disable_ips(intel_crtc);
> + reenable_ips = true;
> + }
Obviously this one isn't your fault, but this should be inspecting
software state rather than hardware register state.
Cheers,
Daniel
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