On Wed, Nov 04, 2015 at 07:24:19PM +0200, Imre Deak wrote: > We don't need to reinit DDI and IRQs during PW1 enabling any more, since > we don't toggle PW1 on-demand any more. We enable PW1 only as part of > the display core init sequence and after this we initialize both DDI and > IRQs later in the init sequence. So remove these init steps from the > power well code. > > Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx> Reviewed-by: Patrik Jakobsson <patrik.jakobsson@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_runtime_pm.c | 6 ------ > 1 file changed, 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > index 3d500e1d..5a36dd5 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -244,12 +244,6 @@ static void skl_power_well_post_enable(struct drm_i915_private *dev_priv, > gen8_irq_power_well_post_enable(dev_priv, > 1 << PIPE_C | 1 << PIPE_B); > } > - > - if (power_well->data == SKL_DISP_PW_1) { > - if (!dev_priv->power_domains.initializing) > - intel_prepare_ddi(dev); > - gen8_irq_power_well_post_enable(dev_priv, 1 << PIPE_A); > - } > } > > static void hsw_set_power_well(struct drm_i915_private *dev_priv, > -- > 2.1.4 > _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx