On Tue, Nov 10, 2015 at 10:59:40AM +0000, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> > > Some random bits to make the LRC irq handler do fewer branching, > locking and VMA lookups per interrupt handled. > > I failed to measure a significant gain on a powerful chip but it > definitely results in fewer instructions and branches in the hot > path. So maybe it would help a lower power chip more. > > Possibly makes the first run of gem_exec_nop have less variance > eg. branch predictor maybe gets warmed up sooner but I am not > completely confident in this interpretation. I have previously posted these and so much more. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
